CEA-Leti reports record performance of nMOS devices fabricated with a maximum temperature of 500°C



The 500°C threshold is key in 3D sequential technologies because processing the upper-level transistors at temperatures higher than that can damage the metal interconnects and the silicide of the bottom-level transistors. CEA-Leti’s CoolCubeTM technology for top-level devices prevents the deterioration of bottom-level transistors.

Shay Reboh, an author of the paper, said MOSFETs for logic or analog applications, as well as the co-integration with miniaturized smart sensors, will be the primary uses for 3D sequential integration. "The technological and commercial benefits of low-temperature layer transfer using Smart CutTM also include cost reduction and recycling of the donor wafer, compared to the use of SOI wafers, plus etch back," he said.

S mart Cut TM is Soitec’s proprietary wafer-bonding and layer-splitting technology that makes it possible to transfer a thin layer of crystalline material from a donor substrate to another substrate.

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